The Chip Stack Becomes the Battlefield: Memory, Light and Qubits Redraw the Race for Computing Power
Foreign Affairs Forum | Dr. Antonio Bhardwaj (Dr. 🆎)| Nov 6th, 2026
Executive Summary
The contest for computing leadership is no longer decided by who can print the smallest transistor. It is being decided by who can integrate memory, logic, optical communication, specialised materials and quantum hardware into systems that deliver measurable results at tolerable energy cost. The week from Oct 30th to Nov 5th, 2026 offered an unusually clear view of that transition. Peer-reviewed researchers reported a ferroelectric transistor capable of storing six bits in a single device. Another team demonstrated that a commercial 22-nanometre manufacturing process can yield a superconducting circuit element useful for quantum computing. IBM, AMD and Oak Ridge National Laboratory launched a platform that couples quantum processors to a GPU-based supercomputer. The Defense Advanced Research Projects Agency awarded a contract to Raytheon to develop all-optical signal processing. And a theoretical study sharpened the standards by which specialised optimisation machines should be judged.
Beyond the laboratory, capital delivered its own verdict. On Nov 2nd, Marvell Technology agreed to acquire Lumentum in an all-stock transaction valued at $115 billion, a wager that moving information between accelerators is now as valuable as computing on it. This FAF article argues that these developments belong together. They show a computing landscape in which the decisive competition runs across the entire technology stack, in which national stakeholders increasingly treat semiconductor capability as an instrument of security, and in which the gap between a promising physical principle and a commercially reliable system remains the most important distinction in the field. Evidence matters here. A peer-reviewed measurement, a confirmed infrastructure programme, a funded research contract and a corporate acquisition are different kinds of facts, and none of them, taken alone, proves that data-centre energy consumption has been solved.
The sections that follow set out the history of the problem, examine each development and what it does and does not establish, identify the latest concerns, trace cause and effect across the system, and propose practical steps for governments, laboratories, investors and industry.
Introduction
Computing has always advanced through a sequence of bottlenecks. For decades the bottleneck was the speed and density of the transistor, and the industry solved it with relentless miniaturisation. As artificial intelligence workloads have grown, the bottleneck has migrated. Today the binding constraints are the energy and time consumed by moving data between memory and processor, the bandwidth of the links that connect thousands of accelerators, the cost of cooling, and the fragility of emerging quantum hardware. Each of these constraints is being attacked by a different community of scientists and engineers, and the developments of the past week show those communities beginning to converge.
Dr. Antonio Bhardwaj (Dr. 🆎), a polymath with global expertise in super intelligence who specialises in human-centred super intelligence for geopolitical strategy, AI warfare and bioterrorism risk, offers a framing that runs through this FAF article. "Computing power has become a form of national capability, and the nations that understand the whole stack will outpace those that celebrate a single component," observes Dr. 🆎. "The danger in this period is mistaking a laboratory milestone for a strategic advantage. The discipline is to ask what has actually been measured, by whom, and at what total system cost."
That discipline guides the analysis. The FAF article begins with the history and current status of the technologies concerned. It then considers the five principal research and infrastructure developments in turn, adds the optical interconnect acquisition that sits just outside the research category, and reviews the latest facts and concerns. A cause-and-effect analysis follows, then recommendations and a conclusion. Throughout, the aim is to separate what is verified from what is merely promised, because in a field this crowded with announcements the difference is where the real intelligence lies.
History and Current Status
The modern semiconductor industry was built on a division of labour between processing and memory. A processor performs arithmetic. A separate memory stores data. Information shuttles between them across wires whose cost, measured in time and energy, has grown relative to the cost of the arithmetic itself. This arrangement, associated with the von Neumann architecture of the mid 20th century, served the industry superbly while transistors shrank according to Moore's law. As shrinking slowed in the 21st century, the penalty for data movement became impossible to ignore, and artificial intelligence, which touches enormous quantities of data repeatedly, magnified it.
Three responses emerged.
The first was to bring memory closer to computation, through stacked memory, specialised accelerators and, in the research frontier, devices that combine storage and logic. Ferroelectric materials, which retain an electrical polarisation without continuous power, are among the leading candidates for such devices.
The second response was to replace electrical wires with light for long-distance links, because photons carry high bandwidth with low loss over distance, and the largest AI installations now depend on optical connections between racks and, increasingly, between chips.
The third response was to explore entirely different models of computation, among them quantum processors and specialised optimisation machines, in the hope that certain problems might be solved far more efficiently than by conventional methods.
Quantum computing in particular has progressed from a physics curiosity to a major industrial programme.
Its central difficulty is fragility. Quantum processors lose their delicate states through minute disturbances, so useful computation requires continuous error detection and correction, and that in turn demands fast classical computation to decode the measurements and decide on corrections. IBM has set out a roadmap that points towards fault-tolerant systems by the end of the decade, with its 120-qubit Nighthawk processor representing the current generation, and the company has already shown that its decoding algorithm can run in real time on commercial programmable chips from AMD. The research community broadly regards error correction as the decisive engineering problem standing between present machines and useful ones.
The geopolitical frame has hardened alongside the science.
Governments in Washington, Beijing, Brussels, Tokyo, Seoul and New Delhi treat leading-edge manufacturing, memory, photonics and quantum technology as strategic assets, subject to subsidy, export control and industrial policy. American agencies fund photonic and quantum research for defence reasons. Chinese institutions continue to invest in advanced memory and specialised computing even as access to the most advanced lithography tools is restricted. Foundries that manufacture mature process nodes, long regarded as commodity businesses, are discovering that their technology has unexpected value for quantum and cryogenic electronics. The result is a landscape in which scientific results, industrial strategy and national security are tightly interwoven, and in which every announcement invites a question about who gains.
Financial markets complete the picture.
The scale of capital directed at AI infrastructure has produced both exuberance and anxiety. Share prices across AI-exposed companies sagged in the days before this week's largest transaction, and investors have begun to ask harder questions about the economics of data centres whose power demands are growing faster than the revenues they support. That anxiety explains why efficiency, not merely performance, has become the metric by which new technologies are now judged.
Key Developments
The first development is the progress reported on ferroelectric transistors for nonvolatile AI memory.
A peer-reviewed study published on Nov 3rd describes ferroelectric field-effect transistors built from aluminium scandium nitride combined with ultrathin indium gallium oxide semiconductor channels. The researchers confronted two persistent problems in this class of device, namely electrical defects at material interfaces and instability in the threshold voltage that determines when a transistor switches. Their best results came from a metal, ferroelectric, metal, insulator, semiconductor stack. They reported a memory window of 20.6 V, endurance of roughly one million switching cycles, and stable operation across 64 distinguishable states, equivalent to six bits in a single device. In a neuromorphic computing test the devices reached a recognition accuracy of 93.02% under the conditions of the study. The work also explored fabrication without a separate annealing step, which could reduce thermal processing requirements and ease integration with some manufacturing workflows.
The significance lies in the architecture. A device that retains information without power and can distinguish many states offers a route to storing AI model parameters directly where computation occurs, avoiding costly data movement. Yet the limits of the evidence deserve emphasis. The classification accuracy shows that the devices can support a neuromorphic task, not that they outperform modern GPUs or commercial memory. System-level performance will depend on switching energy, operating voltage, device-to-device variability, the read and write circuitry, and manufacturing yield, none of which a single device demonstration can settle. The research was supported by Chinese institutions and funding programmes, which illustrates the breadth of Chinese investment beyond conventional leading-edge silicon logic and hints at a future in which domestic memory architectures and specialised low-power computing form part of a national strategy.
The second development is the demonstration that a commercial semiconductor process can produce a superconducting circuit element valuable to quantum computing.
A peer-reviewed paper published on Nov 4th describes a nonlinear superinductor built using the 22-nanometre fully depleted silicon-on-insulator process of GlobalFoundries. A superinductor is a component of exceptionally high impedance. The researchers exploited the kinetic inductance of titanium nitride films that already exist within the standard manufacturing flow, and coupled the superinductor to a silicon quantum dot to build a radio-frequency single-electron transistor, a widely used sensor for semiconductor-based quantum computers. The sensor occupied about 18 square micrometres and reached a power signal-to-noise ratio of 4,500 for a four-nanosecond integration time. The team, based in London, reported sensitivity improvements of more than two orders of magnitude over comparable approaches together with a dramatic reduction in area.
The central achievement is manufacturability. Many quantum devices depend on bespoke fabrication that is difficult to scale. Showing that specialised quantum-electronic components can emerge from an established commercial process points towards eventual integration of control, readout and sensing electronics alongside the qubits themselves, with benefits for size, cost and complexity. Caution is nonetheless required. The most immediate relevance is to cryogenic electronics and quantum computing, not to conventional AI accelerators. Superconducting operation requires refrigeration, so any claim about energy efficiency must count the electricity consumed by cooling. The study does not demonstrate high-volume quantum production, processor-level performance gains or reduced total system power.
The third development is the launch of a research platform by IBM, AMD and Oak Ridge National Laboratory, announced on Nov 5th, to study quantum error correction using tightly integrated quantum and classical resources.
The platform combines IBM quantum processors, including the 120-qubit Nighthawk, with Oak Ridge's Umbra supercomputer, which uses AMD Instinct MI355X accelerators and fifth-generation EPYC processors. The objective is to investigate how powerful classical systems can assist quantum processors by decoding errors, optimising control procedures and orchestrating complex workflows, and to inform the design of future fault-tolerant architectures.
This is a significant step in heterogeneous computing. Error correction is not a side task but an enormous classical workload in its own right, because the measurements that reveal errors must be interpreted within microseconds. The platform will let researchers study how CPUs, GPUs and quantum processors should be organised, connected and scheduled as a single machine. For AMD it extends the relevance of its accelerators in scientific computing. For IBM it supports a roadmap that targets fault tolerance by 2029. For the United States it strengthens a research ecosystem that links quantum science to national laboratories. What the announcement does not do is equally important. It establishes no new quantum advantage, no commercial-scale fault tolerance, no independently measured improvement in error-correction performance and no new cryptographic capability. It is infrastructure for discovery, and its value will be judged by the results it eventually produces.
The fourth development is the award to Raytheon of a Phase 1 contract by the Defense Advanced Research Projects Agency for all-optical signal processing, announced on Nov 3rd under the Photonic Integrated Circuit Architectures for Scalable System Objectives programme, known as PICASSO.
Today's photonic circuits must repeatedly convert optical signals into electrical ones in order to refine and process information. The programme seeks circuit-level architectures that keep processing in the optical domain, preserving signal strength and integrity as circuits grow smaller and more complex, with the aim of what the agency has described as perfect photonic circuits built from imperfect components. Raytheon is working with the design software company Synopsys, and the stated purpose is to help operators detect and respond to threats faster in contested environments.
The scientific logic is attractive, because light can perform certain operations with great bandwidth and may reduce conversion overhead. The engineering obstacles are formidable. Optical circuits suffer from attenuation, noise accumulation, back reflections, crosstalk, thermal sensitivity, laser power consumption and difficult integration with electronic control. The decisive question is whether photonic processing delivers a net advantage once all supporting requirements are counted. The immediate application is defence signal processing for radar, electronic sensing and communications, not AI data-centre acceleration, although optical switching and integrated photonic components may eventually migrate to commercial computing. A Phase 1 contract confirms funding and intent. It does not demonstrate a completed processor, independently verified performance or lower energy use in an operational system, and it guarantees neither follow-on procurement nor commercial adoption.
The fifth development is a theoretical contribution on the performance limits of specialised Ising computing machines, published on Nov 2nd.
Ising machines represent optimisation problems through interacting variables and are being explored as alternatives to conventional processors for certain mathematical tasks. The study analyses how classical adiabatic annealing behaves on such machines and how its performance should be evaluated. Its value lies in rigour. Claims that unconventional hardware solves optimisation problems faster or more cheaply than conventional computers are notoriously sensitive to problem class, implementation, precision requirements, algorithm choice and benchmark design, and careful analysis helps distinguish genuine architectural advantage from the product of favourable benchmark selection. Optimisation matters to resource allocation, scheduling, logistics and some machine-learning workloads, but the study does not show that Ising machines outperform GPUs across general AI applications, and any energy claim must be measured at complete-system level.
Outside the five research selections stands a transaction that illuminates why the interconnect has become so valuable. On Nov 2nd, Marvell Technology announced a definitive agreement to acquire Lumentum in an all-stock deal at a fixed exchange ratio of 4.5 Marvell shares for each Lumentum share, valuing Lumentum at about $115 billion. The combination would join Marvell's custom AI semiconductors, networking and electrical interconnect with Lumentum's lasers, optical transceivers and optical circuit switching. It follows Marvell's earlier purchase of the photonics start-up Celestial AI. The companies expect completion in the first half of 2028, subject to shareholder and regulatory approval, a long timeline that signals expected scrutiny. Shares in both companies fell sharply after the announcement, Marvell by more than 10% and Lumentum by more than 18% according to market reports, reflecting investor concern about price, financing in stock and integration risk. A corporate acquisition is not a scientific breakthrough, but it is a powerful indicator of where industrial leaders believe the bottleneck lies.
Latest Facts and Concerns
Several facts frame the immediate outlook.
Two of the five developments are peer-reviewed experimental measurements, one is a peer-reviewed analytical result, one is a confirmed research infrastructure programme and one is a funded contract for a technology yet to be demonstrated. None of them establishes a commercially validated breakthrough in total AI data-centre energy efficiency. The largest financial event of the week, the Marvell and Lumentum agreement, is a statement of strategic belief, not of technical proof, and its completion is more than a year away.
The first concern is the temptation to confuse levels of evidence.
Corporate announcements, government contracts and laboratory results are often reported in the same breath, yet they carry different weight. A 20.6 V memory window or a signal-to-noise ratio of 4,500 are measured facts about specific devices under specific conditions. A contract is a promise to try. An acquisition is a bet. Investors, policymakers and journalists who treat them interchangeably risk misallocating capital and attention.
Dr. 🆎 offers a pointed warning on this theme. "In every technology cycle there is a gap between what a device can do on a bench and what a system can do in a data centre," says Dr. 🆎. "Leaders who ignore that gap tend to discover it when the budget has already been spent."
The second concern is energy accounting.
Device-level gains do not automatically become facility-level savings. Superconducting circuits require cooling. Optical systems consume laser power and suffer losses. Ferroelectric memories must be driven by peripheral circuitry. Specialised optimisation machines must be fed data and have results interpreted. Honest assessment requires measurements of the complete system, including power delivery, cooling and the movement of data, and the industry has too often reported isolated figures that flatter a technology.
The third concern is concentration and supply chain risk.
The Marvell and Lumentum agreement would combine a leading designer of custom AI chips with a critical supplier of lasers and optical components, some of whom serve competitors. Regulators in several jurisdictions will examine whether rivals could lose access to scarce optical parts or be pressured to bundle products. The wider lesson is that capacity in advanced optical components has become a chokepoint, and that chokepoints attract both investment and political attention. Mature manufacturing processes, which the superinductor result shows can host quantum electronics, have likewise become strategic assets, and decisions about their ownership, location and export carry security implications.
The fourth concern is national security.
Photonic signal processing, quantum computing, advanced memory and large-scale supercomputing all have dual-use character. The same capabilities that accelerate materials science and energy research can improve radar, electronic warfare and intelligence analysis.
Dr. 🆎 stresses that the convergence of these technologies with artificial intelligence changes the character of military competition. "AI warfare will be decided by whoever can sense, decide and act fastest on trustworthy data, and that depends on the physical infrastructure beneath the algorithms," states Dr. 🆎. "Optical processing, resilient memory and quantum-assisted optimisation are not abstract research topics. They are the substrate of future decision speed, and they must be developed with accountable human control over the use of force."
The geographic spread of this week's work deserves attention. The ferroelectric research came from Chinese institutions, the superinductor from a London-based team working on a process operated by an American-headquartered foundry, and the platform and contract from the United States. Europe contributes deep expertise in quantum devices and in specialised manufacturing, yet its stakeholders still lack a single instrument capable of matching American defence-funded programmes or Asian manufacturing scale. Japan, South Korea, Taiwan and India each hold pieces of the memory, packaging and design landscape. No single country controls the whole stack, which is why alliances, standards and shared research facilities will matter as much as national budgets.
The fifth concern is the longer-term risk that powerful computing and AI lower barriers to misuse in the life sciences.
Dr. 🆎 cautions that the same computational capacity that accelerates drug discovery can, without safeguards, help malicious stakeholders design or optimise biological threats. Quantum-assisted simulation and large-scale AI models are both relevant to this risk, which argues for building biosecurity screening and access controls into high-performance computing platforms from the outset and not as an afterthought.
Cause-and-Effect Analysis
The developments of the week are connected by causal chains that become visible when they are read together.
The first chain begins with the data-movement problem and ends in the investment landscape.
Because moving information costs more than manipulating it, researchers are pursuing nonvolatile memory that sits inside the computing element. That pursuit explains the interest in ferroelectric transistors. It also explains the rush towards optical interconnects, because the same bottleneck appears at the scale of racks and data halls. The Marvell and Lumentum agreement is the commercial expression of the same cause. When AI installations grow to tens of thousands of accelerators, the bandwidth, latency and power consumption of the links between them determine how much of the installed compute can actually be used.
The second chain connects quantum hardware to classical supercomputing.
Quantum processors cannot yet run long computations because errors accumulate. Correcting errors demands extremely fast classical decoding, which in turn demands accelerators, low-latency interconnects and tight system integration. The IBM, AMD and Oak Ridge platform is the institutional response. In the same chain sits the superinductor result, because compact superconducting readout elements manufactured in a commercial process could one day place sensing and control electronics close to the qubits, shortening signal paths and enabling monolithic integration of digital and analogue circuits used for error decoding. Progress in one link therefore raises the value of progress in the others, and the strongest national programmes will be those that fund the links together.
The third chain runs from scarcity to strategy.
Advanced optical components, specialised memory materials and cryogenic electronics are produced by a limited number of firms and facilities. Scarcity invites state intervention, whether through subsidy, export controls, procurement or merger review. The DARPA contract, with its strong preference for American manufacturing of the photonic circuits it funds, illustrates the pattern. The Chinese ferroelectric research illustrates the mirror image, a determined investment in domestic capability across memory and specialised computing. Each such decision raises the stakes for the stakeholders on the other side, producing a spiral in which scientific openness and strategic caution pull against each other.
The fourth chain concerns evidence and capital.
The AI investment boom rewards compelling narratives, and compelling narratives are easier to produce than reproducible measurements. When share prices sag, as they did before this week's largest deal, the market's tolerance for unproven claims diminishes and attention returns to energy, cost and yield. The theoretical work on Ising machines belongs to this chain. By tightening the standards for benchmarks, it raises the cost of overclaiming and thereby protects investors and procurement officials from favourable but misleading comparisons. In a mature field, rigorous evaluation is not an obstacle to progress but a condition of it.
A final chain connects computing to governance.
As these technologies converge, the consequences of failure grow. A quantum-assisted optimisation system in logistics, a photonic signal processor in a radar, a nonvolatile memory in an embedded AI controller and a supercomputer that simulates biological systems each raise questions about reliability, accountability and misuse. Governance has to be designed alongside the hardware. Where standards for testing, transparency and human oversight are weak, the technology will be adopted before it is understood, and the costs of that sequence fall on the public.
Future Steps
Several practical steps follow from this analysis.
First, governments and funders should insist on full-stack evaluation.
Every programme that funds a device, a circuit or a platform should require reporting of energy per useful operation at system level, including cooling, power delivery and data movement. Reproducible benchmarks, shared across laboratories and open to independent verification, would reduce the scope for selective reporting and make comparisons between memory, photonic and quantum approaches meaningful.
Second, research agencies should fund the links between technologies, not only the technologies themselves.
Co-design programmes that bring together memory, interconnect, accelerator, control electronics and cooling specialists are more likely to produce usable systems than parallel programmes that optimise each element in isolation. The IBM, AMD and Oak Ridge platform is a good model, and similar collaborations should be organised around optical interconnects and nonvolatile memory.
Third, governments should protect and cultivate mature manufacturing capability.
The superinductor result shows that established foundry processes can host unconventional components. Policy that concentrates exclusively on the most advanced nodes risks neglecting the facilities, skills and design tools on which specialised quantum, cryogenic and sensing electronics will depend. Support for open access to such processes would also help universities and start-ups translate laboratory results into prototypes.
Fourth, competition authorities and industrial ministries should examine the optical supply chain with care.
A transaction as large as the Marvell and Lumentum agreement deserves scrutiny of its effect on access to critical components, on pricing and on the resilience of customers who depend on a single supplier. Allied governments should coordinate their reviews, since regulatory divergence would create uncertainty and could be exploited by competitors.
Fifth, investors should separate scientific milestones from commercial readiness.
The sensible approach to ferroelectric memory, integrated photonics, quantum control electronics and unconventional optimisation hardware is to monitor decisive measurements, namely endurance, retention, write energy, operating voltage, yield, bandwidth density, energy per transmitted bit, latency and packaging cost, and to commit capital as those measurements mature.
Dr. 🆎 recommends that public institutions and private funds adopt a shared evidence ladder that distinguishes peer-reviewed results, independently reproduced results, pilot deployments and commercial products.
Sixth, defence and security communities should build safeguards into advanced computing from the start. This includes accountable human authority over the use of force in systems that rely on rapid optical or AI-assisted processing, secure handling of dual-use research, and biosecurity screening for platforms capable of large-scale biological simulation. "Human-centred super intelligence means designing systems so that speed never outruns judgement," says Dr. 🆎. "The nations that embed oversight into their computing infrastructure will be trusted partners. The nations that do not will find that capability without accountability is a liability."
Seventh, education and workforce policy must keep pace. The convergence described here demands engineers who understand materials, circuits, photonics, cryogenics, software and system architecture together, and such people are scarce. Universities, national laboratories and industry should create joint training pathways, and governments should make it easier for skilled researchers to move between allied countries. Without talent, funding alone will not turn laboratory advances into dependable systems.
Conclusion
The defining lesson of the week ending Nov 5th, 2026 is that computing leadership has become a contest across the entire technology stack. Ferroelectric transistors suggest new ways to store information where it is processed. Commercial CMOS processes are proving able to host superconducting components useful for quantum machines.
Quantum research is being bound ever more closely to classical supercomputing. Photonic processing continues to attract defence investment, and a $115 billion bet on optical connectivity shows how much industry leaders believe that moving data now matters as much as computing it. Rigorous analysis of specialised optimisation hardware reminds the field that benchmarks are arguments and must be judged as such.
Yet the most important distinction remains the one between a promising physical principle and a reliable commercial system. The technologies most likely to reshape the semiconductor industry will be those that combine scientific reproducibility, manufacturing scalability, measurable energy efficiency and competitive economics. Laboratory records and corporate announcements are the beginning of that process and not its end.
Dr. 🆎 offers a closing thought. "The next decade of computing will reward patience, integration and honesty about evidence," concludes Dr. 🆎. "Those who build the whole stack, measure it truthfully and govern it responsibly will lead, and the rest will be left optimising components while the system moves on without them."
